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path: root/src/southbridge/intel/lynxpoint/smihandler.c
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Diffstat (limited to 'src/southbridge/intel/lynxpoint/smihandler.c')
-rw-r--r--src/southbridge/intel/lynxpoint/smihandler.c28
1 files changed, 15 insertions, 13 deletions
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index e3b0f3c25c..aebc038189 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -76,13 +76,9 @@ static void busmaster_disable_on_bus(int bus)
}
}
-static void southbridge_smi_sleep(void)
+static int power_on_after_fail(void)
{
- u8 reg8;
- u32 reg32;
- u8 slp_typ;
u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
- u16 pmbase = get_pmbase();
/* save and recover RTC port values */
u8 tmp70, tmp72;
@@ -92,6 +88,16 @@ static void southbridge_smi_sleep(void)
outb(tmp70, 0x70);
outb(tmp72, 0x72);
+ /* For "KEEP", switch to "OFF" - KEEP is software emulated. */
+ return (s5pwr == MAINBOARD_POWER_ON);
+}
+
+static void southbridge_smi_sleep(void)
+{
+ u32 reg32;
+ u8 slp_typ;
+ u16 pmbase = get_pmbase();
+
/* First, disable further SMIs */
disable_smi(SLP_SMI_EN);
@@ -139,15 +145,11 @@ static void southbridge_smi_sleep(void)
/* Disable all GPE */
disable_all_gpe();
- /* Always set the flag in case CMOS was changed on runtime. For
- * "KEEP", switch to "OFF" - KEEP is software emulated
- */
- reg8 = pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3);
- if (s5pwr == MAINBOARD_POWER_ON)
- reg8 &= ~1;
+ /* Always set the flag in case CMOS was changed on runtime. */
+ if (power_on_after_fail())
+ pci_and_config8(PCH_LPC_DEV, GEN_PMCON_3, ~1);
else
- reg8 |= 1;
- pci_write_config8(PCH_LPC_DEV, GEN_PMCON_3, reg8);
+ pci_or_config8(PCH_LPC_DEV, GEN_PMCON_3, 1);
/* also iterates over all bridges on bus 0 */
busmaster_disable_on_bus(0);