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path: root/src/southbridge/intel/lynxpoint/early_pch.c
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Diffstat (limited to 'src/southbridge/intel/lynxpoint/early_pch.c')
-rw-r--r--src/southbridge/intel/lynxpoint/early_pch.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index 38506c9438..9909bb6d44 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -42,6 +42,12 @@ const struct rcba_config_instruction pch_early_config[] = {
RCBA_END_CONFIG,
};
+int pch_is_lp(void)
+{
+ u8 id = pci_read_config8(PCH_LPC_DEV, PCI_DEVICE_ID + 1);
+ return id == PCH_TYPE_LPT_LP;
+}
+
static void pch_enable_bars(void)
{
/* Setting up Southbridge. In the northbridge code. */