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Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r--src/southbridge/intel/ibexpeak/early_pch.c2
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c3
2 files changed, 1 insertions, 4 deletions
diff --git a/src/southbridge/intel/ibexpeak/early_pch.c b/src/southbridge/intel/ibexpeak/early_pch.c
index ace09e292f..df380c5bde 100644
--- a/src/southbridge/intel/ibexpeak/early_pch.c
+++ b/src/southbridge/intel/ibexpeak/early_pch.c
@@ -33,7 +33,7 @@ void ibexpeak_setup_bars(void)
pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, DEFAULT_PMBASE | 1);
/* Enable ACPI BAR */
- pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x44 /* ACPI_CNTL */, 0x80);
+ pci_write_config8(PCH_LPC_DEV, ACPI_CNTL, ACPI_EN);
printk(BIOS_DEBUG, " done.\n");
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index dddecd79d0..d2a3404880 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -39,9 +39,6 @@ static void pch_enable_ioapic(struct device *dev)
{
u32 reg32;
- /* Enable ACPI I/O range decode */
- pci_write_config8(dev, ACPI_CNTL, ACPI_EN);
-
set_ioapic_id(VIO_APIC_VADDR, 0x01);
/* affirm full set of redirection table entries ("write once") */
reg32 = io_apic_read(VIO_APIC_VADDR, 0x01);