diff options
Diffstat (limited to 'src/southbridge/intel/i82801xx/i82801xx_smbus.h')
| -rw-r--r-- | src/southbridge/intel/i82801xx/i82801xx_smbus.h | 74 |
1 files changed, 38 insertions, 36 deletions
diff --git a/src/southbridge/intel/i82801xx/i82801xx_smbus.h b/src/southbridge/intel/i82801xx/i82801xx_smbus.h index d0226046da..2c2676e728 100644 --- a/src/southbridge/intel/i82801xx/i82801xx_smbus.h +++ b/src/southbridge/intel/i82801xx/i82801xx_smbus.h @@ -34,8 +34,8 @@ static int smbus_wait_until_ready(void) if (--loops == 0) break; byte = inb(SMBUS_IO_BASE + SMBHSTSTAT); - } while(byte & 1); - return loops?0:-1; + } while (byte & 1); + return loops ? 0 : -1; } static int smbus_wait_until_done(void) @@ -43,12 +43,12 @@ static int smbus_wait_until_done(void) unsigned loops = SMBUS_TIMEOUT; unsigned char byte; do { - smbus_delay(); - if (--loops == 0) - break; - byte = inb(SMBUS_IO_BASE + SMBHSTSTAT); - } while((byte & 1) || (byte & ~((1<<6)|(1<<0))) == 0); - return loops?0:-1; + smbus_delay(); + if (--loops == 0) + break; + byte = inb(SMBUS_IO_BASE + SMBHSTSTAT); + } while ((byte & 1) || (byte & ~((1 << 6) | (1 << 0))) == 0); + return loops ? 0 : -1; } static int smbus_wait_until_blk_done(void) @@ -56,12 +56,12 @@ static int smbus_wait_until_blk_done(void) unsigned loops = SMBUS_TIMEOUT; unsigned char byte; do { - smbus_delay(); - if (--loops == 0) - break; - byte = inb(SMBUS_IO_BASE + SMBHSTSTAT); - } while((byte & (1 << 7)) == 0); - return loops?0:-1; + smbus_delay(); + if (--loops == 0) + break; + byte = inb(SMBUS_IO_BASE + SMBHSTSTAT); + } while ((byte & (1 << 7)) == 0); + return loops ? 0 : -1; } static int do_smbus_read_byte(unsigned device, unsigned address) @@ -80,15 +80,17 @@ static int do_smbus_read_byte(unsigned device, unsigned address) /* Set the command/address... */ outb(address & 0xff, SMBUS_IO_BASE + SMBHSTCMD); /* Set up for a byte data read */ - outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x2 << 2), (SMBUS_IO_BASE + SMBHSTCTL)); + outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x2 << 2), + (SMBUS_IO_BASE + SMBHSTCTL)); /* Clear any lingering errors, so the transaction will run */ outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); - /* Clear the data byte...*/ + /* Clear the data byte... */ outb(0, SMBUS_IO_BASE + SMBHSTDAT0); /* Start the command */ - outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40), SMBUS_IO_BASE + SMBHSTCTL); + outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40), + SMBUS_IO_BASE + SMBHSTCTL); /* Poll for transaction completion */ if (smbus_wait_until_done() < 0) { @@ -110,8 +112,8 @@ static int do_smbus_read_byte(unsigned device, unsigned address) /* This function is neither used nor tested by me (Corey Osgood), the author (Yinghai) probably tested/used it on i82801er */ -static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd, - unsigned data1, unsigned data2) +static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd, + unsigned data1, unsigned data2) { #warning "do_smbus_write_block is commented out" print_err("Untested smbus_write_block called\r\n"); @@ -124,55 +126,55 @@ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd, /* Clear the PM timeout flags, SECOND_TO_STS */ outw(inw(0x0400 + 0x66), 0x0400 + 0x66); - + if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) { return -2; } - + /* Setup transaction */ /* Obtain ownership */ outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); - for(stat = 0; (stat & 0x40) == 0; ) { - stat = inb(SMBUS_IO_BASE + SMBHSTSTAT); + for (stat = 0; (stat & 0x40) == 0;) { + stat = inb(SMBUS_IO_BASE + SMBHSTSTAT); } /* Clear the done bit */ outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT); /* Disable interrupts */ outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL); - + /* Set the device I'm talking too */ outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD); - + /* Set the command address */ outb(cmd & 0xff, SMBUS_IO_BASE + SMBHSTCMD); - + /* Set the block length */ outb(length & 0xff, SMBUS_IO_BASE + SMBHSTDAT0); - + /* Try sending out the first byte of data here */ byte = (data1 >> (0)) & 0x0ff; outb(byte, SMBUS_IO_BASE + SMBBLKDAT); /* Issue a block write command */ - outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x5 << 2) | 0x40, - SMBUS_IO_BASE + SMBHSTCTL); + outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x5 << 2) | 0x40, + SMBUS_IO_BASE + SMBHSTCTL); + + for (i = 0; i < length; i++) { - for(i = 0;i < length; i++) { - /* Poll for transaction completion */ if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) { return -3; } - + /* Load the next byte */ - if(i > 3) + if (i > 3) byte = (data2 >> (i % 4)) & 0x0ff; else byte = (data1 >> (i)) & 0x0ff; outb(byte, SMBUS_IO_BASE + SMBBLKDAT); - + /* Clear the done bit */ - outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), - SMBUS_IO_BASE + SMBHSTSTAT); + outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), + SMBUS_IO_BASE + SMBHSTSTAT); } print_debug("SMBUS Block complete\r\n"); |