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Diffstat (limited to 'src/southbridge/intel/i82801db/cmos_failover.c')
-rw-r--r--src/southbridge/intel/i82801db/cmos_failover.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801db/cmos_failover.c b/src/southbridge/intel/i82801db/cmos_failover.c
new file mode 100644
index 0000000000..5b4bbd2909
--- /dev/null
+++ b/src/southbridge/intel/i82801db/cmos_failover.c
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+//kind of cmos_err for ich5
+#define RTC_FAILED (1 <<2)
+#define GEN_PMCON_3 0xa4
+static void check_cmos_failed(void)
+{
+
+ uint8_t byte;
+ byte = pci_read_config8(PCI_DEV(0,0x1f,0),GEN_PMCON_3);
+ if( byte & RTC_FAILED){
+//clear bit 1 and bit 2
+ byte = cmos_read(RTC_BOOT_BYTE);
+ byte &= 0x0c;
+ byte |= MAX_REBOOT_CNT << 4;
+ cmos_write(byte, RTC_BOOT_BYTE);
+ }
+}