aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82371eb/isa.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/i82371eb/isa.c')
-rw-r--r--src/southbridge/intel/i82371eb/isa.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index bd0e964378..2bab05cb15 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -28,7 +28,7 @@
#endif
#include "i82371eb.h"
-#if CONFIG_IOAPIC
+#if IS_ENABLED(CONFIG_IOAPIC)
static void enable_intel_82093aa_ioapic(void)
{
u16 reg16;
@@ -84,7 +84,7 @@ static void isa_init(struct device *dev)
/* Initialize ISA DMA. */
isa_dma_init();
-#if CONFIG_IOAPIC
+#if IS_ENABLED(CONFIG_IOAPIC)
/*
* Unlike most other southbridges the 82371EB doesn't have a built-in
* IOAPIC. Instead, 82371EB-based boards that support multiple CPUs
@@ -115,7 +115,7 @@ static void sb_read_resources(struct device *dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED |
IORESOURCE_RESERVE;
-#if CONFIG_IOAPIC
+#if IS_ENABLED(CONFIG_IOAPIC)
res = new_resource(dev, 3); /* IOAPIC */
res->base = IO_APIC_ADDR;
res->size = 0x00001000;