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-rw-r--r--src/southbridge/amd/sb700/Kconfig2
-rw-r--r--src/southbridge/amd/sb700/sm.c8
2 files changed, 4 insertions, 6 deletions
diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig
index 6d62e67d37..58dc75a5de 100644
--- a/src/southbridge/amd/sb700/Kconfig
+++ b/src/southbridge/amd/sb700/Kconfig
@@ -23,6 +23,8 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
select IOAPIC
select HAVE_USBDEBUG_OPTIONS
select SMBUS_HAS_AUX_CHANNELS
+ select HAVE_POWER_STATE_AFTER_FAILURE
+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
config SOUTHBRIDGE_AMD_SB700_33MHZ_SPI
bool "Enable high speed SPI clock"
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c
index 64c6db3072..4c3992d8d5 100644
--- a/src/southbridge/amd/sb700/sm.c
+++ b/src/southbridge/amd/sb700/sm.c
@@ -44,10 +44,6 @@ enum power_mode {
POWER_MODE_LAST = 2,
};
-#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL POWER_MODE_ON
-#endif
-
static const char *power_mode_names[] = {
[POWER_MODE_OFF] = "off",
[POWER_MODE_ON] = "on",
@@ -152,11 +148,11 @@ static void sm_init(struct device *dev)
pm_iowrite(0x53, byte);
/* power after power fail */
- power_state = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ power_state = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
get_option(&power_state, "power_on_after_fail");
if (power_state > 2) {
printk(BIOS_WARNING, "Invalid power_on_after_fail setting, using default\n");
- power_state = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ power_state = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
}
byte = pm_ioread(0x74);
byte &= ~0x03;