diff options
Diffstat (limited to 'src/southbridge/amd/sb700')
| -rw-r--r-- | src/southbridge/amd/sb700/early_setup.c | 13 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/sb700.h | 1 |
2 files changed, 13 insertions, 1 deletions
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 8042849007..ffdd34b017 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2010 Advanced Micro Devices, Inc. - * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering + * Copyright (C) 2015 - 2016 Raptor Engineering, LLC * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -758,6 +758,17 @@ static void sb700_por_init(void) sb700_pmio_por_init(); } +uint16_t sb7xx_51xx_decode_last_reset(void) { + uint16_t reset_status = 0; + reset_status |= pmio_read(0x44); + reset_status |= (pmio_read(0x45) << 8); + printk(BIOS_INFO, "sb700 reset flags: %04x\n", reset_status); + if (reset_status & (0x1 << 10)) + printk(BIOS_WARNING, "WARNING: Last reset was caused by fatal error / sync flood!\n"); + + return reset_status; +} + /* * It should be called during early POST after memory detection and BIOS shadowing but before PCI bus enumeration. */ diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index f895811472..f23956cb5a 100644 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -66,6 +66,7 @@ void sb7xx_51xx_enable_wideio(u8 wio_index, u16 base); void sb7xx_51xx_disable_wideio(u8 wio_index); void sb7xx_51xx_early_setup(void); void sb7xx_51xx_before_pci_init(void); +uint16_t sb7xx_51xx_decode_last_reset(void); #else #include <device/pci.h> /* allow override in mainboard.c */ |