diff options
Diffstat (limited to 'src/southbridge/amd/cimx/sb700')
-rw-r--r-- | src/southbridge/amd/cimx/sb700/lpc.c | 13 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb700/lpc.h | 4 |
2 files changed, 11 insertions, 6 deletions
diff --git a/src/southbridge/amd/cimx/sb700/lpc.c b/src/southbridge/amd/cimx/sb700/lpc.c index 91d7d2fd51..5d05762f55 100644 --- a/src/southbridge/amd/cimx/sb700/lpc.c +++ b/src/southbridge/amd/cimx/sb700/lpc.c @@ -46,8 +46,6 @@ void lpc_read_resources(device_t dev) /* Get the normal pci resources of this device */ pci_dev_read_resources(dev); /* We got one for APIC, or one more for TRAP */ - pci_get_resource(dev, SPIROM_BASE_ADDRESS); /* SPI ROM base address */ - /* Add an extra subtractive resource for both memory and I/O. */ res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); res->base = 0; @@ -61,6 +59,9 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + /* Add a memory resource for the SPI BAR. */ + fixed_mem_resource(dev, 2, SPI_BASE_ADDRESS / 1024, 1, IORESOURCE_SUBTRACTIVE); + res = new_resource(dev, 3); res->base = IO_APIC_ADDR; res->size = 0x00001000; @@ -75,11 +76,13 @@ void lpc_set_resources(struct device *dev) struct resource *res; printk(BIOS_SPEW, "SB700 - Lpc.c - %s - Start.\n", __func__); + + /* Special case. SPI Base Address. The SpiRomEnable should STAY set. */ + res = find_resource(dev, 2); + pci_write_config32(dev, SPIROM_BASE_ADDRESS_REGISTER, res->base | SPI_ROM_ENABLE); + pci_dev_set_resources(dev); - /* Specical case. SPI Base Address. The SpiRomEnable should be set. */ - res = find_resource(dev, SPIROM_BASE_ADDRESS); - pci_write_config32(dev, SPIROM_BASE_ADDRESS, res->base | 1 << 1); printk(BIOS_SPEW, "SB700 - Lpc.c - %s - End.\n", __func__); } diff --git a/src/southbridge/amd/cimx/sb700/lpc.h b/src/southbridge/amd/cimx/sb700/lpc.h index e110026126..b30f2470d4 100644 --- a/src/southbridge/amd/cimx/sb700/lpc.h +++ b/src/southbridge/amd/cimx/sb700/lpc.h @@ -21,7 +21,9 @@ #define _SB700_LPC_H_ -#define SPIROM_BASE_ADDRESS 0xA0 /* SPI ROM base address */ +#define SPIROM_BASE_ADDRESS_REGISTER 0xA0 +#define SPI_ROM_ENABLE 0x02 +#define SPI_BASE_ADDRESS 0xFEC10000 void lpc_read_resources(device_t dev); void lpc_set_resources(device_t dev); |