diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/sabrina/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/espi_util.c | 20 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/include/soc/espi.h | 8 |
3 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/amd/sabrina/Makefile.inc b/src/soc/amd/sabrina/Makefile.inc index b180156d9a..3271c9f3fd 100644 --- a/src/soc/amd/sabrina/Makefile.inc +++ b/src/soc/amd/sabrina/Makefile.inc @@ -12,6 +12,7 @@ all-y += aoac.c bootblock-y += bootblock.c bootblock-y += early_fch.c +bootblock-y += espi_util.c bootblock-y += gpio.c bootblock-y += i2c.c bootblock-y += reset.c diff --git a/src/soc/amd/sabrina/espi_util.c b/src/soc/amd/sabrina/espi_util.c new file mode 100644 index 0000000000..20db1b6d9e --- /dev/null +++ b/src/soc/amd/sabrina/espi_util.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/spi.h> +#include <soc/espi.h> +#include <types.h> + +#define ESPI_CNTRL_REGISTER 0x10 +#define LOCK_SPIX10_BIT2 BIT(3) +#define ESPI_MUX_SPI1 BIT(2) +#define ROM_ADDR_WR_PROT BIT(1) +#define DIS_ESPI_MASCTL_REG_WR BIT(0) + +void espi_switch_to_spi1_pads(void) +{ + uint8_t reg = spi_read8(ESPI_CNTRL_REGISTER); + + reg |= ESPI_MUX_SPI1; + + spi_write8(ESPI_CNTRL_REGISTER, reg); +} diff --git a/src/soc/amd/sabrina/include/soc/espi.h b/src/soc/amd/sabrina/include/soc/espi.h new file mode 100644 index 0000000000..76af3a1dc9 --- /dev/null +++ b/src/soc/amd/sabrina/include/soc/espi.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_SABRINA_ESPI_H +#define AMD_SABRINA_ESPI_H + +void espi_switch_to_spi1_pads(void); + +#endif /* AMD_SABRINA_ESPI_H */ |