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-rw-r--r--src/soc/intel/baytrail/acpi.c53
-rw-r--r--src/soc/intel/baytrail/fadt.c2
-rw-r--r--src/soc/intel/baytrail/include/soc/acpi.h2
-rw-r--r--src/soc/intel/braswell/acpi.c52
-rw-r--r--src/soc/intel/braswell/fadt.c2
-rw-r--r--src/soc/intel/braswell/include/soc/acpi.h1
-rw-r--r--src/soc/intel/common/block/acpi/acpi.c40
7 files changed, 60 insertions, 92 deletions
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index 1c6023dabd..dce55af59e 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -10,7 +10,6 @@
#include <cpu/x86/msr.h>
#include <cpu/intel/turbo.h>
-#include <soc/acpi.h>
#include <soc/iomap.h>
#include <soc/irq.h>
#include <soc/msr.h>
@@ -52,14 +51,21 @@ static const acpi_cstate_t cstate_map[] = {
}
};
-int acpi_sci_irq(void)
+static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
+{
+ if (sci_irq >= 20)
+ return MP_IRQ_POLARITY_LOW;
+ else
+ return MP_IRQ_POLARITY_HIGH;
+}
+
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
+ int sci_irq = ACPI_SCI_IRQ;
int scis;
- static int sci_irq;
-
- if (sci_irq)
- return sci_irq;
/* Determine how SCI is routed. */
scis = read32(actl) & SCIS_MASK;
@@ -76,13 +82,15 @@ int acpi_sci_irq(void)
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
- sci_irq = 9;
+ printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
- return sci_irq;
+ *gsi = sci_irq;
+ *irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
+
+ printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
static acpi_tstate_t soc_tss_table[] = {
@@ -280,33 +288,14 @@ void generate_cpu_entries(const struct device *device)
acpigen_write_processor_cnot(pattrs->num_cpus);
}
-static unsigned long acpi_madt_irq_overrides(unsigned long current)
-{
- int sci_irq = acpi_sci_irq();
- acpi_madt_irqoverride_t *irqovr;
- uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
-
- /* INT_SRC_OVR */
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
- if (sci_irq >= 20)
- sci_flags |= MP_IRQ_POLARITY_LOW;
- else
- sci_flags |= MP_IRQ_POLARITY_HIGH;
-
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
-
- return current;
-}
-
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
- current = acpi_madt_irq_overrides(current);
+ /* INT_SRC_OVR */
+ current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_sci_override((void *)current);
return current;
}
diff --git a/src/soc/intel/baytrail/fadt.c b/src/soc/intel/baytrail/fadt.c
index 64154db354..a76d161c8d 100644
--- a/src/soc/intel/baytrail/fadt.c
+++ b/src/soc/intel/baytrail/fadt.c
@@ -11,7 +11,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
- fadt->sci_int = acpi_sci_irq();
+ fadt->sci_int = acpi_sci_int();
if (permanent_smi_handler()) {
fadt->smi_cmd = APM_CNT;
diff --git a/src/soc/intel/baytrail/include/soc/acpi.h b/src/soc/intel/baytrail/include/soc/acpi.h
index b747db7d33..db07de1ff6 100644
--- a/src/soc/intel/baytrail/include/soc/acpi.h
+++ b/src/soc/intel/baytrail/include/soc/acpi.h
@@ -5,6 +5,4 @@
#include <acpi/acpi.h>
-int acpi_sci_irq(void);
-
#endif /* _BAYTRAIL_ACPI_H_ */
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 1927421b40..0ea54b8679 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -81,14 +81,21 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN;
}
-int acpi_sci_irq(void)
+static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
+{
+ if (sci_irq >= 20)
+ return MP_IRQ_POLARITY_LOW;
+ else
+ return MP_IRQ_POLARITY_HIGH;
+}
+
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
+ int sci_irq = ACPI_SCI_IRQ;
int scis;
- static int sci_irq;
-
- if (sci_irq)
- return sci_irq;
/* Determine how SCI is routed. */
scis = read32(actl) & SCIS_MASK;
@@ -105,13 +112,15 @@ int acpi_sci_irq(void)
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
- sci_irq = 9;
+ printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
- return sci_irq;
+ *gsi = sci_irq;
+ *irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
+
+ printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
static acpi_tstate_t soc_tss_table[] = {
@@ -309,33 +318,14 @@ void generate_cpu_entries(const struct device *device)
acpigen_write_processor_cnot(pattrs->num_cpus);
}
-static unsigned long acpi_madt_irq_overrides(unsigned long current)
-{
- int sci_irq = acpi_sci_irq();
- acpi_madt_irqoverride_t *irqovr;
- uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
-
- /* INT_SRC_OVR */
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
-
- if (sci_irq >= 20)
- sci_flags |= MP_IRQ_POLARITY_LOW;
- else
- sci_flags |= MP_IRQ_POLARITY_HIGH;
-
- irqovr = (void *)current;
- current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
-
- return current;
-}
-
unsigned long acpi_fill_madt(unsigned long current)
{
/* IOAPIC */
current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
- current = acpi_madt_irq_overrides(current);
+ /* INT_SRC_OVR */
+ current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_sci_override((void *)current);
return current;
}
diff --git a/src/soc/intel/braswell/fadt.c b/src/soc/intel/braswell/fadt.c
index 64154db354..a76d161c8d 100644
--- a/src/soc/intel/braswell/fadt.c
+++ b/src/soc/intel/braswell/fadt.c
@@ -11,7 +11,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
- fadt->sci_int = acpi_sci_irq();
+ fadt->sci_int = acpi_sci_int();
if (permanent_smi_handler()) {
fadt->smi_cmd = APM_CNT;
diff --git a/src/soc/intel/braswell/include/soc/acpi.h b/src/soc/intel/braswell/include/soc/acpi.h
index ccb48eb447..fa4c804aa7 100644
--- a/src/soc/intel/braswell/include/soc/acpi.h
+++ b/src/soc/intel/braswell/include/soc/acpi.h
@@ -5,7 +5,6 @@
#include <acpi/acpi.h>
-int acpi_sci_irq(void);
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
unsigned long southcluster_write_acpi_tables(const struct device *device,
unsigned long current, struct acpi_rsdp *rsdp);
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index cfc15a840d..50854fa374 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -24,9 +24,11 @@
#define CPUID_6_EAX_ISST (1 << 7)
-static int acpi_sci_irq(void)
+#define ACPI_SCI_IRQ 9
+
+void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
{
- int sci_irq = 9;
+ int sci_irq = ACPI_SCI_IRQ;
uint32_t scis;
scis = soc_read_sci_irq_select();
@@ -47,32 +49,18 @@ static int acpi_sci_irq(void)
sci_irq = scis - SCIS_IRQ20 + 20;
break;
default:
- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
- sci_irq = 9;
+ printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
break;
}
- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
- return sci_irq;
-}
-
-static unsigned long acpi_madt_irq_overrides(unsigned long current)
-{
- int sci = acpi_sci_irq();
- uint16_t flags = MP_IRQ_TRIGGER_LEVEL;
-
- /* INT_SRC_OVR */
- current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
-
- flags |= soc_madt_sci_irq_polarity(sci);
+ *gsi = sci_irq;
+ *irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
+ *flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
- /* SCI */
- current +=
- acpi_create_madt_irqoverride((void *)current, 0, sci, sci, flags);
-
- return current;
+ printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
}
+
static const uintptr_t default_ioapic_bases[] = { IO_APIC_ADDR };
__weak size_t soc_get_ioapic_info(const uintptr_t *ioapic_bases[])
@@ -95,14 +83,18 @@ unsigned long acpi_fill_madt(unsigned long current)
for (int i = 0; i < ioapic_entries; i++)
current += acpi_create_madt_ioapic_from_hw((void *)current, ioapic_table[i]);
- return acpi_madt_irq_overrides(current);
+ /* INT_SRC_OVR */
+ current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
+ current += acpi_create_madt_sci_override((void *)current);
+
+ return current;
}
void acpi_fill_fadt(acpi_fadt_t *fadt)
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
- fadt->sci_int = acpi_sci_irq();
+ fadt->sci_int = acpi_sci_int();
if (permanent_smi_handler()) {
fadt->smi_cmd = APM_CNT;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 05:14:40 +0000