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-rw-r--r--src/soc/intel/cannonlake/Kconfig3
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c2
-rw-r--r--src/soc/intel/cannonlake/smihandler.c5
3 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 8fed9e96bb..4a084a347d 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -107,6 +107,9 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC
select UDK_2017_BINDING
+config DISABLE_HECI1_AT_PRE_BOOT
+ default y if MAINBOARD_HAS_CHROMEOS
+
config MAX_CPUS
int
default 12
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index fc12890410..af356d1985 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -587,7 +587,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->Heci3Enabled = is_devfn_enabled(PCH_DEVFN_CSE_3);
#if !CONFIG(HECI_DISABLE_USING_SMM)
- params->Heci1Disabled = !is_devfn_enabled(PCH_DEVFN_CSE);
+ params->Heci1Disabled = CONFIG(DISABLE_HECI1_AT_PRE_BOOT);
#endif
params->Device4Enable = config->Device4Enable;
diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c
index a287a7bc0a..61283c941b 100644
--- a/src/soc/intel/cannonlake/smihandler.c
+++ b/src/soc/intel/cannonlake/smihandler.c
@@ -16,10 +16,7 @@
*/
void smihandler_soc_at_finalize(void)
{
- if (!CONFIG(HECI_DISABLE_USING_SMM))
- return;
-
- if (!is_devfn_enabled(PCH_DEVFN_CSE))
+ if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) && CONFIG(HECI_DISABLE_USING_SMM))
heci_disable();
}