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-rw-r--r--src/soc/cavium/cn81xx/timer.c4
-rw-r--r--src/soc/nvidia/tegra210/ramstage.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/cavium/cn81xx/timer.c b/src/soc/cavium/cn81xx/timer.c
index b1c2285b6d..f2a870adee 100644
--- a/src/soc/cavium/cn81xx/timer.c
+++ b/src/soc/cavium/cn81xx/timer.c
@@ -17,6 +17,7 @@
*/
#include <arch/io.h>
+#include <arch/lib_helpers.h>
#include <console/console.h>
#include <inttypes.h>
#include <soc/clock.h>
@@ -25,7 +26,6 @@
#include <timer.h>
#include <soc/addressmap.h>
#include <assert.h>
-#include <arch/clock.h>
/* Global System Timers Unit (GTI) registers */
struct cn81xx_timer {
@@ -131,7 +131,7 @@ void init_timer(void)
void soc_timer_init(void)
{
- set_cntfrq(tickrate);
+ raw_write_cntfrq_el0(tickrate);
}
/**
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c
index 18fdded800..86fae67c43 100644
--- a/src/soc/nvidia/tegra210/ramstage.c
+++ b/src/soc/nvidia/tegra210/ramstage.c
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
-#include <arch/clock.h>
#include <arch/cpu.h>
+#include <arch/lib_helpers.h>
#include <arch/stages.h>
#include <gic.h>
#include <soc/addressmap.h>
@@ -26,7 +26,7 @@ static void arm64_arch_timer_init(void)
{
uint32_t freq = clock_get_osc_khz() * 1000;
// Set the cntfrq register.
- set_cntfrq(freq);
+ raw_write_cntfrq_el0(freq);
}
static void mselect_enable_wrap(void)