diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/broadwell/Kconfig | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 3a5b5d52c1..61513e8b70 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -19,6 +19,25 @@ config BROADWELL_LPDDR3 Selected by mainboards using LPDDR3 DRAM to supply mainboard-specific LPDDR3 DQ and DQS CPU-to-DRAM mapping info needed to perform raminit. +config BROADWELL_VBOOT_IN_BOOTBLOCK + depends on VBOOT + bool "Start verstage in bootblock" + default y + select VBOOT_STARTS_IN_BOOTBLOCK + help + Broadwell can either start verstage in a separate stage + right after the bootblock has run or it can start it + after romstage for compatibility reasons. + Broadwell however uses a mrc.bin to initialize memory which + needs to be located at a fixed offset. Therefore even with + a separate verstage starting after the bootblock that same + binary is used meaning a jump is made from RW to the RO region + and back to the RW region after the binary is done. + +config VBOOT + select VBOOT_MUST_REQUEST_DISPLAY + select VBOOT_STARTS_IN_ROMSTAGE if !BROADWELL_VBOOT_IN_BOOTBLOCK + config ECAM_MMCONF_BASE_ADDRESS default 0xf0000000 @@ -84,6 +103,13 @@ config MRC_BIN_ADDRESS hex default 0xfffa0000 +# The UEFI System Agent binary needs to be at a fixed offset in the flash +# and can therefore only reside in the COREBOOT fmap region +config RO_REGION_ONLY + string + depends on VBOOT + default "mrc.bin" + endif # HAVE_MRC config HAVE_REFCODE_BLOB |