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-rw-r--r--src/soc/amd/common/block/cpu/Kconfig11
-rw-r--r--src/soc/amd/common/block/cpu/tsc/Makefile.inc20
-rw-r--r--src/soc/amd/common/block/cpu/tsc/monotonic_timer.c (renamed from src/soc/amd/picasso/monotonic_timer.c)0
-rw-r--r--src/soc/amd/common/block/cpu/tsc/tsc_freq.c (renamed from src/soc/amd/picasso/tsc_freq.c)0
-rw-r--r--src/soc/amd/picasso/Kconfig4
-rw-r--r--src/soc/amd/picasso/Makefile.inc11
6 files changed, 32 insertions, 14 deletions
diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig
index 826f80bdb5..c155975590 100644
--- a/src/soc/amd/common/block/cpu/Kconfig
+++ b/src/soc/amd/common/block/cpu/Kconfig
@@ -27,3 +27,14 @@ config MEMLAYOUT_LD_FILE
default "src/soc/amd/common/block/cpu/noncar/memlayout.ld"
endif # SOC_AMD_COMMON_BLOCK_NONCAR
+
+config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
+ bool
+ select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function
+ select TSC_SYNC_LFENCE
+ select UDELAY_TSC
+ default n
+ help
+ Select this option to add the common functions for getting the TSC
+ frequency of AMD family 17h and 19h CPUs/APUs and to provide TSC-
+ based monotonic timer functionality to the build.
diff --git a/src/soc/amd/common/block/cpu/tsc/Makefile.inc b/src/soc/amd/common/block/cpu/tsc/Makefile.inc
new file mode 100644
index 0000000000..4f2729bcb6
--- /dev/null
+++ b/src/soc/amd/common/block/cpu/tsc/Makefile.inc
@@ -0,0 +1,20 @@
+ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H),y)
+
+subdirs-y += ../../../../../../cpu/x86/tsc
+
+bootblock-y += tsc_freq.c
+bootblock-y += monotonic_timer.c
+
+verstage_x86-y += tsc_freq.c
+verstage_x86-y += monotonic_timer.c
+
+romstage-y += tsc_freq.c
+romstage-y += monotonic_timer.c
+
+ramstage-y += tsc_freq.c
+ramstage-y += monotonic_timer.c
+
+smm-y += tsc_freq.c
+smm-y += monotonic_timer.c
+
+endif # CONFIG_SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
diff --git a/src/soc/amd/picasso/monotonic_timer.c b/src/soc/amd/common/block/cpu/tsc/monotonic_timer.c
index 941532cca6..941532cca6 100644
--- a/src/soc/amd/picasso/monotonic_timer.c
+++ b/src/soc/amd/common/block/cpu/tsc/monotonic_timer.c
diff --git a/src/soc/amd/picasso/tsc_freq.c b/src/soc/amd/common/block/cpu/tsc/tsc_freq.c
index 55c86653ce..55c86653ce 100644
--- a/src/soc/amd/picasso/tsc_freq.c
+++ b/src/soc/amd/common/block/cpu/tsc/tsc_freq.c
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 2ac1235fcf..79fc3be621 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -24,10 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select IOAPIC
select HAVE_EM100_SUPPORT
select HAVE_USBDEBUG_OPTIONS
- select COLLECT_TIMESTAMPS_NO_TSC
select SOC_AMD_COMMON_BLOCK_SPI
- select TSC_SYNC_LFENCE
- select UDELAY_TSC
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_NONCAR
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
@@ -44,6 +41,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_SMBUS
select SOC_AMD_COMMON_BLOCK_SMI
select SOC_AMD_COMMON_BLOCK_SMU
+ select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_PSP_GEN2
select PROVIDES_ROM_SHARING
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index c77278337e..d86d97e7e2 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -3,7 +3,6 @@
ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
subdirs-y += ../../../cpu/amd/mtrr/
-subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/cache
subdirs-y += ../../../cpu/x86/mtrr
@@ -17,8 +16,6 @@ bootblock-y += southbridge.c
bootblock-y += i2c.c
bootblock-y += uart.c
bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
-bootblock-y += monotonic_timer.c
-bootblock-y += tsc_freq.c
bootblock-y += gpio.c
bootblock-y += config.c
bootblock-y += reset.c
@@ -30,8 +27,6 @@ romstage-y += reset.c
romstage-y += memmap.c
romstage-y += uart.c
romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
-romstage-y += monotonic_timer.c
-romstage-y += tsc_freq.c
romstage-y += aoac.c
romstage-y += southbridge.c
romstage-y += psp.c
@@ -44,8 +39,6 @@ verstage-y += aoac.c
verstage_x86-y += gpio.c
verstage_x86-y += uart.c
verstage_x86-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
-verstage_x86-y += monotonic_timer.c
-verstage_x86-y += tsc_freq.c
verstage_x86-y += reset.c
ramstage-y += i2c.c
@@ -66,8 +59,6 @@ ramstage-y += memmap.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-y += uart.c
ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
-ramstage-y += monotonic_timer.c
-ramstage-y += tsc_freq.c
ramstage-y += finalize.c
ramstage-y += soc_util.c
ramstage-y += psp.c
@@ -80,8 +71,6 @@ ramstage-y += xhci.c
ramstage-y += dmi.c
smm-y += smihandler.c
-smm-y += monotonic_timer.c
-smm-y += tsc_freq.c
ifeq ($(CONFIG_DEBUG_SMI),y)
smm-y += uart.c
smm-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c