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-rw-r--r--src/soc/intel/tigerlake/chip.h2
-rw-r--r--src/soc/intel/tigerlake/fsp_params.c2
2 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 09c8db1caf..fb0d8278b8 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -274,8 +274,6 @@ struct soc_intel_tigerlake_config {
/* Gfx related */
uint8_t SkipExtGfxScan;
- uint8_t Device4Enable;
-
/* HeciEnabled decides the state of Heci1 at end of boot
* Setting to 0 (default) disables Heci1 and hides the device from OS */
uint8_t HeciEnabled;
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index 89c8126af0..40676f1b7d 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -474,7 +474,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->SlowSlewRate[0] = config->SlowSlewRate;
/* Enable TCPU for processor thermal control */
- params->Device4Enable = config->Device4Enable;
+ params->Device4Enable = is_devfn_enabled(SA_DEVFN_DPTF);
/* Set TccActivationOffset */
params->TccActivationOffset = config->tcc_offset;