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-rw-r--r--src/soc/intel/skylake/chip.h2
-rw-r--r--src/soc/intel/skylake/romstage/fsp_params.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index d30547ec26..59f75bf353 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -94,7 +94,7 @@ struct soc_intel_skylake_config {
} SaGv;
/* Enable/disable Rank Margin Tool */
- u8 Rmt;
+ u8 RMT;
/* Disable Command TriState */
u8 CmdTriStateDis;
diff --git a/src/soc/intel/skylake/romstage/fsp_params.c b/src/soc/intel/skylake/romstage/fsp_params.c
index f05532c416..21526e4848 100644
--- a/src/soc/intel/skylake/romstage/fsp_params.c
+++ b/src/soc/intel/skylake/romstage/fsp_params.c
@@ -83,7 +83,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->ProbelessTrace = 0;
m_cfg->SaGv = config->SaGv;
m_cfg->UserBd = BOARD_TYPE_ULT_ULX;
- m_cfg->RMT = config->Rmt;
+ m_cfg->RMT = config->RMT;
m_cfg->CmdTriStateDis = config->CmdTriStateDis;
m_cfg->DdrFreqLimit = 0;
m_cfg->VmxEnable = CONFIG(ENABLE_VMX);