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-rw-r--r--src/soc/amd/common/block/include/amdblocks/psp.h2
-rw-r--r--src/soc/amd/stoneyridge/include/soc/northbridge.h1
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c2
-rw-r--r--src/soc/intel/apollolake/graphics.c1
-rw-r--r--src/soc/intel/baytrail/gfx.c1
-rw-r--r--src/soc/intel/broadwell/igd.c1
-rw-r--r--src/soc/intel/cannonlake/graphics.c1
-rw-r--r--src/soc/intel/icelake/graphics.c1
-rw-r--r--src/soc/intel/skylake/graphics.c1
-rw-r--r--src/soc/mediatek/common/pll.c1
-rw-r--r--src/soc/mediatek/mt8173/ddp.c1
-rw-r--r--src/soc/mediatek/mt8173/pll.c3
-rw-r--r--src/soc/mediatek/mt8173/rtc.c1
-rw-r--r--src/soc/nvidia/tegra210/dsi.c8
-rw-r--r--src/soc/nvidia/tegra210/include/soc/dma.h1
-rw-r--r--src/soc/nvidia/tegra210/mipi-phy.c3
-rw-r--r--src/soc/nvidia/tegra210/spi.c3
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/clock.h1
-rw-r--r--src/soc/rockchip/common/gpio.c1
-rw-r--r--src/soc/rockchip/rk3399/include/soc/mipi.h1
-rw-r--r--src/soc/rockchip/rk3399/mipi.c2
21 files changed, 25 insertions, 12 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h
index 25a564b457..512b0b8c04 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@@ -18,7 +18,7 @@
#include <amdblocks/agesawrapper.h>
#include <soc/pci_devs.h>
-#include <stdint.h>
+#include <types.h>
/* Extra, Special Purpose Registers in the PSP PCI Config Space */
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h
index 563dae09e1..60a6ea22bb 100644
--- a/src/soc/amd/stoneyridge/include/soc/northbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h
@@ -18,6 +18,7 @@
#define __PI_STONEYRIDGE_NORTHBRIDGE_H__
#include <device/device.h>
+#include <types.h>
/* D0F0 - Root Complex */
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index bf8787c1fc..84db3dd76c 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -14,7 +14,6 @@
*/
#include <console/console.h>
-
#include <device/mmio.h>
#include <bootstate.h>
#include <cpu/x86/smm.h>
@@ -36,6 +35,7 @@
#include <soc/pci_devs.h>
#include <agesa_headers.h>
#include <soc/nvs.h>
+#include <types.h>
/*
* Table of devices that need their AOAC registers enabled and waited
diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c
index 51661d0cfc..f5136ec103 100644
--- a/src/soc/intel/apollolake/graphics.c
+++ b/src/soc/intel/apollolake/graphics.c
@@ -26,6 +26,7 @@
#include <intelblocks/graphics.h>
#include <drivers/intel/gma/opregion.h>
#include <drivers/intel/gma/libgfxinit.h>
+#include <types.h>
uintptr_t fsp_soc_get_igd_bar(void)
{
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index d2cb589db8..2048c13824 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -28,6 +28,7 @@
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <cbmem.h>
+#include <types.h>
#include "chip.h"
diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index b9b42810fc..9107b23eb9 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -36,6 +36,7 @@
#include <soc/intel/broadwell/chip.h>
#include <security/vboot/vbnv.h>
#include <soc/igd.h>
+#include <types.h>
#define GT_RETRY 1000
enum {
diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c
index a89dcb31fb..2acfecc5b0 100644
--- a/src/soc/intel/cannonlake/graphics.c
+++ b/src/soc/intel/cannonlake/graphics.c
@@ -23,6 +23,7 @@
#include <drivers/intel/gma/i915_reg.h>
#include <drivers/intel/gma/opregion.h>
#include <intelblocks/graphics.h>
+#include <types.h>
uintptr_t fsp_soc_get_igd_bar(void)
{
diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c
index 35fe8b6236..0fbddf06e9 100644
--- a/src/soc/intel/icelake/graphics.c
+++ b/src/soc/intel/icelake/graphics.c
@@ -23,6 +23,7 @@
#include <drivers/intel/gma/i915_reg.h>
#include <drivers/intel/gma/opregion.h>
#include <intelblocks/graphics.h>
+#include <types.h>
uintptr_t fsp_soc_get_igd_bar(void)
{
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c
index 07ee67ab88..f563c11302 100644
--- a/src/soc/intel/skylake/graphics.c
+++ b/src/soc/intel/skylake/graphics.c
@@ -25,6 +25,7 @@
#include <drivers/intel/gma/opregion.h>
#include <soc/nvs.h>
#include <soc/ramstage.h>
+#include <types.h>
uintptr_t fsp_soc_get_igd_bar(void)
{
diff --git a/src/soc/mediatek/common/pll.c b/src/soc/mediatek/common/pll.c
index 0968d2f59f..a63fe8927b 100644
--- a/src/soc/mediatek/common/pll.c
+++ b/src/soc/mediatek/common/pll.c
@@ -16,6 +16,7 @@
#include <device/mmio.h>
#include <assert.h>
#include <soc/pll.h>
+#include <types.h>
#define GENMASK(h, l) (BIT(h + 1) - BIT(l))
diff --git a/src/soc/mediatek/mt8173/ddp.c b/src/soc/mediatek/mt8173/ddp.c
index 0b78c3ea64..f8896d391a 100644
--- a/src/soc/mediatek/mt8173/ddp.c
+++ b/src/soc/mediatek/mt8173/ddp.c
@@ -19,6 +19,7 @@
#include <stddef.h>
#include <soc/addressmap.h>
#include <soc/ddp.h>
+#include <types.h>
#define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16)
#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16)
diff --git a/src/soc/mediatek/mt8173/pll.c b/src/soc/mediatek/mt8173/pll.c
index 7eb12b1282..e1c1bff6d5 100644
--- a/src/soc/mediatek/mt8173/pll.c
+++ b/src/soc/mediatek/mt8173/pll.c
@@ -16,11 +16,10 @@
#include <device/mmio.h>
#include <assert.h>
#include <delay.h>
-#include <stddef.h>
-
#include <soc/addressmap.h>
#include <soc/infracfg.h>
#include <soc/pll.h>
+#include <types.h>
enum mux_id {
TOP_AXI_SEL,
diff --git a/src/soc/mediatek/mt8173/rtc.c b/src/soc/mediatek/mt8173/rtc.c
index 79e5732c2f..9ad4caa89c 100644
--- a/src/soc/mediatek/mt8173/rtc.c
+++ b/src/soc/mediatek/mt8173/rtc.c
@@ -18,6 +18,7 @@
#include <soc/rtc.h>
#include <soc/mt6391.h>
#include <soc/pmic_wrap.h>
+#include <types.h>
#define RTC_GPIO_USER_MASK ((1 << 13) - (1 << 8))
diff --git a/src/soc/nvidia/tegra210/dsi.c b/src/soc/nvidia/tegra210/dsi.c
index 76054f0156..ae20d44d16 100644
--- a/src/soc/nvidia/tegra210/dsi.c
+++ b/src/soc/nvidia/tegra210/dsi.c
@@ -12,9 +12,10 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+
+#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/mmio.h>
-#include <stdint.h>
#include <stdlib.h>
#include <delay.h>
#include <timer.h>
@@ -24,14 +25,15 @@
#include <edid.h>
#include <soc/nvidia/tegra/types.h>
#include <soc/nvidia/tegra/dc.h>
-#include "chip.h"
#include <soc/display.h>
#include <soc/mipi_dsi.h>
#include <soc/mipi_display.h>
#include <soc/tegra_dsi.h>
#include <soc/mipi-phy.h>
+#include <types.h>
+
+#include "chip.h"
#include "jdi_25x18_display/panel-jdi-lpm102a188a.h"
-#include <commonlib/helpers.h>
struct tegra_mipi_device mipi_device_data[NUM_DSI];
diff --git a/src/soc/nvidia/tegra210/include/soc/dma.h b/src/soc/nvidia/tegra210/include/soc/dma.h
index 1093479d5f..3cb94ce8d3 100644
--- a/src/soc/nvidia/tegra210/include/soc/dma.h
+++ b/src/soc/nvidia/tegra210/include/soc/dma.h
@@ -19,6 +19,7 @@
#include <inttypes.h>
#include <soc/addressmap.h>
+#include <types.h>
/*
* The DMA engine operates on 4 bytes at a time, so make sure any data
diff --git a/src/soc/nvidia/tegra210/mipi-phy.c b/src/soc/nvidia/tegra210/mipi-phy.c
index 4e6bdf0242..4e56730d3b 100644
--- a/src/soc/nvidia/tegra210/mipi-phy.c
+++ b/src/soc/nvidia/tegra210/mipi-phy.c
@@ -13,9 +13,7 @@
* GNU General Public License for more details.
*/
-#include <stdint.h>
#include <stdlib.h>
-
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <device/device.h>
@@ -25,6 +23,7 @@
#include <soc/mipi_display.h>
#include <soc/tegra_dsi.h>
#include <soc/mipi-phy.h>
+#include <types.h>
int mipi_dphy_set_timing(struct tegra_dsi *dsi)
{
diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c
index edb052df6b..9310e0cc09 100644
--- a/src/soc/nvidia/tegra210/spi.c
+++ b/src/soc/nvidia/tegra210/spi.c
@@ -26,9 +26,8 @@
#include <soc/addressmap.h>
#include <soc/dma.h>
#include <soc/spi.h>
-#include <stdint.h>
-#include <stdlib.h>
#include <symbols.h>
+#include <types.h>
#if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI
# define DEBUG_SPI(x,...) printk(BIOS_DEBUG, "TEGRA_SPI: " x)
diff --git a/src/soc/qualcomm/ipq806x/include/soc/clock.h b/src/soc/qualcomm/ipq806x/include/soc/clock.h
index 482deadfe7..7ecc1eee16 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/clock.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/clock.h
@@ -34,6 +34,7 @@
#define __IPQ860X_CLOCK_H_
#include <soc/iomap.h>
+#include <types.h>
/* UART clock @ 7.3728 MHz */
#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
diff --git a/src/soc/rockchip/common/gpio.c b/src/soc/rockchip/common/gpio.c
index fa0990b10b..3d7e1614e0 100644
--- a/src/soc/rockchip/common/gpio.c
+++ b/src/soc/rockchip/common/gpio.c
@@ -20,6 +20,7 @@
#include <soc/grf.h>
#include <soc/soc.h>
#include <stdlib.h>
+#include <types.h>
static void gpio_set_dir(gpio_t gpio, enum gpio_dir dir)
{
diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h
index f304d8fcd0..43ab7b914f 100644
--- a/src/soc/rockchip/rk3399/include/soc/mipi.h
+++ b/src/soc/rockchip/rk3399/include/soc/mipi.h
@@ -17,6 +17,7 @@
#define __RK_MIPI_H
#include <stdlib.h>
+#include <types.h>
struct rk_mipi_regs {
u32 dsi_version;
diff --git a/src/soc/rockchip/rk3399/mipi.c b/src/soc/rockchip/rk3399/mipi.c
index cc16563c43..1f3f02cbee 100644
--- a/src/soc/rockchip/rk3399/mipi.c
+++ b/src/soc/rockchip/rk3399/mipi.c
@@ -20,13 +20,13 @@
#include <edid.h>
#include <gpio.h>
#include <stdlib.h>
-#include <stdint.h>
#include <string.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/display.h>
#include <soc/mipi.h>
#include <soc/soc.h>
+#include <types.h>
#include <timer.h>
static struct rk_mipi_dsi rk_mipi[2] = {
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 12:12:22 +0000