1 files changed, 15 insertions, 28 deletions

diff --git a/src/soc/nvidia/tegra132/mmu_operations.c b/src/soc/nvidia/tegra132/mmu_operations.c
index 123f89842e..23531bee79 100644
--- a/src/soc/nvidia/tegra132/mmu_operations.c
+++ b/src/soc/nvidia/tegra132/mmu_operations.c
@@ -14,16 +14,14 @@
  */
 
 #include <arch/mmu.h>
-#include <memrange.h>
+#include <assert.h>
 #include <soc/addressmap.h>
 #include <soc/mmu_operations.h>
 #include <stdlib.h>
 #include <stdint.h>
+#include <symbols.h>
 
-/* This structure keeps track of all the mmap memory ranges for t132 */
-static struct memranges t132_mmap_ranges;
-
-static void tegra132_memrange_init(struct memranges *map)
+static void tegra132_mmu_config(void)
 {
 	uint64_t start,end;
 	const unsigned long devmem = MA_DEV | MA_S | MA_RW;
@@ -32,46 +30,35 @@ static void tegra132_memrange_init(struct memranges *map)
 	uintptr_t tz_base_mib;
 	size_t tz_size_mib;
 
-	memranges_init_empty(map);
-
 	memory_in_range_below_4gb(&start,&end);
 
 	/* Device memory below DRAM */
-	memranges_insert(map, 0, start * MiB, devmem);
+	mmu_config_range((void *)0, start * MiB, devmem);
 
 	/* DRAM */
-	memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem);
+	mmu_config_range((void *)(start * MiB), (end-start) * MiB, cachedmem);
 
 	memory_in_range_above_4gb(&start,&end);
 
-	memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem);
+	mmu_config_range((void *)(start * MiB), (end-start) * MiB, cachedmem);
 
 	/* SRAM */
-	memranges_insert(map, TEGRA_SRAM_BASE, TEGRA_SRAM_SIZE, cachedmem);
+	mmu_config_range(_sram, _sram_size, cachedmem);
 
 	/* Add TZ carveout. */
 	carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
-	memranges_insert(map, tz_base_mib * MiB, tz_size_mib * MiB, secure_mem);
-}
 
-void __attribute__((weak)) mainboard_add_memory_ranges(struct memranges *map)
-{
-	/* Don't add any ranges by default. */
+	mmu_config_range((void *)(tz_base_mib * MiB),
+			 tz_size_mib * MiB, secure_mem);
+
+	/* Ensure page tables are at the base of the trust zone region. */
+	assert((uintptr_t)_ttb == tz_base_mib * MiB &&
+	       _ttb_size <= tz_size_mib * MiB);
 }
 
 void tegra132_mmu_init(void)
 {
-	uintptr_t tz_base_mib;
-	size_t tz_size_mib;
-	size_t ttb_size_mib;
-	struct memranges *map = &t132_mmap_ranges;
-
-	tegra132_memrange_init(map);
-	mainboard_add_memory_ranges(map);
-	/* Place page tables at the base of the trust zone region. */
-	carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
-	tz_base_mib *= MiB;
-	ttb_size_mib = TTB_SIZE * MiB;
-	mmu_init(map, (void *)tz_base_mib, ttb_size_mib);
+	mmu_init();
+	tegra132_mmu_config();
 	mmu_enable();
 }