diff options
Diffstat (limited to 'src/soc/nvidia/tegra124/Kconfig')
| -rw-r--r-- | src/soc/nvidia/tegra124/Kconfig | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig index 38ecc0bb23..ec6ee92ea3 100644 --- a/src/soc/nvidia/tegra124/Kconfig +++ b/src/soc/nvidia/tegra124/Kconfig @@ -24,6 +24,20 @@ config BOOTBLOCK_CPU_INIT # 0x00000 Combined bootblock and BCT blob # 0x18000 Master CBFS header. # 0x18080 Free for CBFS data. +# +# iRAM (256k) layout. +# 0x4000_0000 BootROM runtime data/stack area, can be reclaimed after BootROM. +# +0000 (BootROM) Boot Information Table. +# +0100 (BootROM) BCT. +# --------------------------------------------------------------------- +# +0000 (Coreboot) TTB 16KB. +# +4000 (Coreboot) Stack. +# 0x4000_E000 Valid for anything to be executed after BootROM (effective entry +# point address specified in BCT). +# +0000 (Coreboot) Bootblock (max 36k). +# +9000 (Coreboot) ROM stage (max 36k). +# 0x4002_0000 (Coreboot) Cache of CBFS. +# 0x4003_FFFF End of iRAM. config BOOTBLOCK_ROM_OFFSET hex @@ -43,11 +57,11 @@ config SYS_SDRAM_BASE config BOOTBLOCK_BASE hex - default 0x80000000 + default 0x4000e000 config ROMSTAGE_BASE hex - default 0x80100000 + default 0x40017000 config RAMSTAGE_BASE hex @@ -55,11 +69,11 @@ config RAMSTAGE_BASE config STACK_TOP hex - default 0x80400000 + default 0x4000c000 config STACK_BOTTOM hex - default 0x803f8000 + default 0x40004000 config STACK_SIZE hex @@ -72,7 +86,7 @@ config TTB_BUFFER config CBFS_CACHE_ADDRESS hex "memory address to put CBFS cache data" - default 0x803c0000 + default 0x40020000 config CBFS_CACHE_SIZE hex "size of CBFS cache data" |