1 files changed, 12 insertions, 33 deletions
diff --git a/src/soc/mediatek/mt8192/include/soc/spi.h b/src/soc/mediatek/mt8192/include/soc/spi.h
index 034fa3570a..db3ba21613 100644
--- a/src/soc/mediatek/mt8192/include/soc/spi.h
+++ b/src/soc/mediatek/mt8192/include/soc/spi.h
@@ -7,38 +7,17 @@
 
 #define SPI_BUS_NUMBER 8
 
-/* SPI peripheral register map. */
-typedef struct mtk_spi_regs {
-	uint32_t spi_cfg0_reg;
-	uint32_t spi_cfg1_reg;
-	uint32_t spi_tx_src_reg;
-	uint32_t spi_rx_dst_reg;
-	uint32_t spi_tx_data_reg;
-	uint32_t spi_rx_data_reg;
-	uint32_t spi_cmd_reg;
-	uint32_t spi_status0_reg;
-	uint32_t spi_status1_reg;
-	uint32_t spi_pad_macro_sel_reg;
-	uint32_t spi_cfg2_reg;
-	uint32_t spi_tx_src_64_reg;
-	uint32_t spi_rx_dst_64_reg;
-} mtk_spi_regs;
-
-check_member(mtk_spi_regs, spi_pad_macro_sel_reg, 0x24);
-
-enum {
-	SPI_CFG0_CS_HOLD_SHIFT = 0,
-	SPI_CFG0_CS_SETUP_SHIFT = 16,
-};
-
-enum {
-	SPI_CFG2_SCK_LOW_SHIFT = 0,
-	SPI_CFG2_SCK_HIGH_SHIFT = 16,
-};
-
-enum {
-	SPI_CFG1_TICK_DLY_SHIFT = 29,
-	SPI_CFG1_TICK_DLY_MASK = 0x7 << SPI_CFG1_TICK_DLY_SHIFT,
-};
+#define GET_SCK_REG(x) x->spi_cfg2_reg
+
+DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
+DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
+
+DEFINE_BITFIELD(SPI_CFG_SCK_LOW, 15, 0)
+DEFINE_BITFIELD(SPI_CFG_SCK_HIGH, 31, 16)
+
+DEFINE_BITFIELD(SPI_CFG1_CS_IDLE, 7, 0)
+DEFINE_BITFIELD(SPI_CFG1_PACKET_LOOP, 15, 8)
+DEFINE_BITFIELD(SPI_CFG1_PACKET_LENGTH, 28, 16)
+DEFINE_BITFIELD(SPI_CFG1_TICK_DLY, 31, 29)
 
 #endif