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-rw-r--r--src/soc/mediatek/mt8173/include/soc/dsi.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8173/include/soc/dsi.h b/src/soc/mediatek/mt8173/include/soc/dsi.h
index 1abbd78ae9..73f4425684 100644
--- a/src/soc/mediatek/mt8173/include/soc/dsi.h
+++ b/src/soc/mediatek/mt8173/include/soc/dsi.h
@@ -263,7 +263,33 @@ enum {
RG_DSI_MPPLL_SDM_PWR_ACK = BIT(8)
};
+/* LVDS_TX1_REG */
+struct lvds_tx1_regs {
+ u32 lvdstx1_ctl1;
+ u32 lvdstx1_ctl2;
+ u32 lvdstx1_ctl3;
+ u32 lvdstx1_ctl4;
+ u32 lvdstx1_ctl5;
+ u32 vopll_ctl1;
+ u32 vopll_ctl2;
+ u32 vopll_ctl3;
+};
+
+static struct lvds_tx1_regs * const lvds_tx1 = (void *)(MIPI_TX0_BASE + 0x800);
+
+/* LVDS_VOPLL_CTRL3 */
+enum {
+ RG_LVDSTX_21EDG = BIT(0),
+ RG_LVDSTX_21LEV = BIT(1),
+ RG_LVDSTX_51EDG = BIT(2),
+ RG_LVDSTX_51LEV = BIT(3),
+ RG_AD_LVDSTX_PWR_ACK = BIT(4),
+ RG_DA_LVDS_ISO_EN = BIT(8),
+ RG_DA_LVDSTX_PWR_ON = BIT(9)
+};
+
int mtk_dsi_init(u32 mode_flags, enum mipi_dsi_pixel_format format, u32 lanes,
const struct edid *edid);
+void mtk_dsi_pin_drv_ctrl(void);
#endif