aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/chip.c2
-rw-r--r--src/soc/intel/apollolake/chip.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 57aa0858f4..e3bfa1e273 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -607,7 +607,7 @@ static void glk_fsp_silicon_init_params_cb(
/*
* Options to disable XHCI Link Compliance Mode.
*/
- silconfig->DisableComplianceMode = cfg->DisableComplianceMode;
+ silconfig->DisableComplianceMode = cfg->disable_compliance_mode;
/*
* Options to change USB3 ModPhy setting for Integrated Filter value.
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 88ec1ff21b..c1bc0209dc 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -184,7 +184,7 @@ struct soc_intel_apollolake_config {
* disable Compliance Mode. Set TRUE to disable Compliance Mode.
* 0:FALSE(Default), 1:True.
*/
- uint8_t DisableComplianceMode;
+ uint8_t disable_compliance_mode;
/* Options to change USB3 ModPhy setting for the Integrated Filter (IF)
* value. Default is 0 to not changing default IF value (0x12). Set