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-rw-r--r--src/soc/intel/cannonlake/chip.h1
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c3
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index e5ceac9312..9e7aa45eda 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -228,7 +228,6 @@ struct soc_intel_cannonlake_config {
uint8_t PchIshEnable;
/* Heci related */
- uint8_t Heci3Enabled;
uint8_t DisableHeciRetry;
/* Gfx related */
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 51ed2a8b57..615a94f32e 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -525,7 +525,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
else
params->ScsUfsEnabled = dev->enabled;
- params->Heci3Enabled = config->Heci3Enabled;
+ dev = pcidev_path_on_root(PCH_DEVFN_CSE_3);
+ params->Heci3Enabled = is_dev_enabled(dev);
#if !CONFIG(HECI_DISABLE_USING_SMM)
dev = pcidev_path_on_root(PCH_DEVFN_CSE);
params->Heci1Disabled = !is_dev_enabled(dev);