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-rw-r--r--src/soc/intel/common/block/cse/cse.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index e41e337550..68a41e869c 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -111,6 +111,9 @@ void heci_init(uintptr_t tempbar)
/* Enable Bus Master and MMIO Space */
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
+
+ /* Trigger HECI Reset and make Host ready for communication with CSE */
+ heci_reset();
}
static uint32_t read_bar(pci_devfn_t dev, uint32_t offset)