diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/chip.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 8 |
2 files changed, 2 insertions, 7 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index cea63bf466..04a4a2272f 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -348,6 +348,7 @@ struct soc_intel_alderlake_config { uint16_t sata_ports_dito_val[8]; /* Audio related */ + uint8_t pch_hda_audio_link_hda_enable; uint8_t pch_hda_dsp_enable; /* iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T */ diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 6016bffa1a..f18e1f48b0 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -242,13 +242,7 @@ static void fill_fspm_audio_params(FSP_M_CONFIG *m_cfg, m_cfg->PchHdaIDispLinkTmode = config->pch_hda_idisp_link_tmode; m_cfg->PchHdaIDispLinkFrequency = config->pch_hda_idisp_link_frequency; m_cfg->PchHdaIDispCodecDisconnect = !config->pch_hda_idisp_codec_enable; - /* - * All the PchHdaAudioLink{Hda|Dmic|Ssp|Sndw}Enable UPDs are used by FSP only to - * configure GPIO pads for audio. Mainboard is expected to perform all GPIO - * configuration in coreboot and hence these UPDs are set to 0 to skip FSP GPIO - * configuration for audio pads. - */ - m_cfg->PchHdaAudioLinkHdaEnable = 0; + m_cfg->PchHdaAudioLinkHdaEnable = config->pch_hda_audio_link_hda_enable; memset(m_cfg->PchHdaAudioLinkDmicEnable, 0, sizeof(m_cfg->PchHdaAudioLinkDmicEnable)); memset(m_cfg->PchHdaAudioLinkSspEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSspEnable)); memset(m_cfg->PchHdaAudioLinkSndwEnable, 0, sizeof(m_cfg->PchHdaAudioLinkSndwEnable)); |