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-rw-r--r--src/soc/intel/common/block/systemagent/Kconfig1
-rw-r--r--src/soc/intel/common/block/systemagent/memmap.c8
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/systemagent/Kconfig b/src/soc/intel/common/block/systemagent/Kconfig
index 4ba83f8817..d8c217f25a 100644
--- a/src/soc/intel/common/block/systemagent/Kconfig
+++ b/src/soc/intel/common/block/systemagent/Kconfig
@@ -1,5 +1,6 @@
config SOC_INTEL_COMMON_BLOCK_SA
bool
+ select SOC_INTEL_COMMON_BASECODE
help
Intel Processor common System Agent support
diff --git a/src/soc/intel/common/block/systemagent/memmap.c b/src/soc/intel/common/block/systemagent/memmap.c
index 97344cd8cd..380974e4a7 100644
--- a/src/soc/intel/common/block/systemagent/memmap.c
+++ b/src/soc/intel/common/block/systemagent/memmap.c
@@ -6,6 +6,7 @@
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/smm.h>
+#include <intelbasecode/tom.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/systemagent.h>
#include <types.h>
@@ -69,6 +70,13 @@ void fill_postcar_frame(struct postcar_frame *pcf)
*/
printk(BIOS_DEBUG, "top_of_ram = 0x%lx\n", top_of_ram);
+ /*
+ * Store the top_of_ram (TOM) into the CMOS if SOC_INTEL_COMMON_BASECODE_TOM
+ * config is enabled.
+ */
+ if (ENV_ROMSTAGE && CONFIG(SOC_INTEL_COMMON_BASECODE_TOM))
+ update_tom(top_of_ram);
+
postcar_frame_add_mtrr(pcf, top_of_ram - 16 * MiB, 16 * MiB, MTRR_TYPE_WRBACK);
/* Cache the TSEG region */