diff options
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/cannonlake/pmc.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c index 24ddfee796..84bfba06c0 100644 --- a/src/soc/intel/cannonlake/pmc.c +++ b/src/soc/intel/cannonlake/pmc.c @@ -158,20 +158,26 @@ static void pmc_init(void *unused) */ BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, pmc_init, NULL); -void pmc_soc_init(struct device *dev) +static void soc_acpi_mode_init(void *unused) { /* * PMC initialization happens earlier for this SoC because FSP-Silicon * init hides PMC from PCI bus. However, pmc_set_acpi_mode, which * disables ACPI mode doesn't need to happen that early and can be - * delayed till typical pmc_soc_init callback. This ensures that ACPI - * mode disabling happens the same way for all SoCs and hence the - * ordering of events is the same. + * delayed till typical BS_DEV_INIT. This ensures that ACPI mode + * disabling happens the same way for all SoCs and hence the ordering of + * events is the same. * * This is important to ensure that the ordering does not break the * assumptions of any other drivers (e.g. ChromeEC) which could be * taking different actions based on disabling of ACPI (e.g. flushing of * all EC hostevent bits). + * + * P.S.: This cannot be done as part of pmc_soc_init as PMC device is + * hidden and hence the PMC driver never gets enumerated and so init is + * not called for it. */ pmc_set_acpi_mode(); } + +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, soc_acpi_mode_init, NULL); |