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-rw-r--r--src/soc/intel/baytrail/Kconfig2
-rw-r--r--src/soc/intel/fsp_baytrail/Kconfig2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index a93b487b87..a6a3a44cfa 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -148,7 +148,7 @@ config DCACHE_RAM_ROMSTAGE_STACK_SIZE
default 0x800
help
The amount of anticipated stack usage from the data cache
- during pre-ram rom stage execution.
+ during pre-RAM ROM stage execution.
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig
index 312449ee67..cb4757bca3 100644
--- a/src/soc/intel/fsp_baytrail/Kconfig
+++ b/src/soc/intel/fsp_baytrail/Kconfig
@@ -78,7 +78,7 @@ config VGA_BIOS_ID
default "8086,0f31"
help
This is the default PCI ID for the Bay Trail graphics
- devices. This string names the vbios rom in cbfs.
+ devices. This string names the vbios ROM in cbfs.
config INCLUDE_MICROCODE_IN_BUILD
bool "Build in microcode patch"