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-rw-r--r--src/soc/intel/skylake/Kconfig2
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c3
-rw-r--r--src/soc/intel/skylake/uart.c3
3 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index dbf68a737d..d3c541d40e 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -17,8 +17,6 @@ config CPU_SPECIFIC_OPTIONS
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select CACHE_ROM
select CAR_MIGRATION
- select CONSOLE_SERIAL8250MEM
- select CONSOLE_SERIAL8250MEM_32
select COLLECT_TIMESTAMPS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_MICROCODE_IN_CBFS
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 919b747211..04ffa3e656 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -50,7 +50,8 @@ void soc_pre_console_init(struct romstage_params *params)
/* System Agent Early Initialization */
systemagent_early_init();
- pch_uart_init();
+ if (IS_ENABLED(CONFIG_CONSOLE_UART8250MEM_32))
+ pch_uart_init();
}
/* SOC initialization before RAM is enabled */
diff --git a/src/soc/intel/skylake/uart.c b/src/soc/intel/skylake/uart.c
index 03d2ba6a7c..9304118053 100644
--- a/src/soc/intel/skylake/uart.c
+++ b/src/soc/intel/skylake/uart.c
@@ -36,7 +36,8 @@ static void pch_uart_read_resources(struct device *dev)
pci_dev_read_resources(dev);
/* Set the configured UART base address for the debug port */
- if (pch_uart_is_debug(dev)) {
+ if (IS_ENABLED(CONFIG_CONSOLE_SERIAL8250MEM_32) &&
+ pch_uart_is_debug(dev)) {
struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
res->size = 0x1000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED |