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-rw-r--r--src/soc/intel/apollolake/chip.c12
-rw-r--r--src/soc/intel/apollolake/include/soc/cpu.h1
-rw-r--r--src/soc/intel/apollolake/include/soc/msr.h4
-rw-r--r--src/soc/intel/common/block/cpu/cpulib.c13
-rw-r--r--src/soc/intel/common/block/include/intelblocks/cpulib.h6
-rw-r--r--src/soc/intel/common/block/include/intelblocks/msr.h3
6 files changed, 16 insertions, 23 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 651bd8418c..98844a52fd 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -28,6 +28,7 @@
#include <soc/intel/common/vbt.h>
#include <soc/iomap.h>
#include <soc/itss.h>
+#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/systemagent.h>
@@ -702,10 +703,19 @@ struct chip_operations soc_intel_apollolake_ops = {
.final = &soc_final
};
+static void soc_enable_untrusted_mode(void *unused)
+{
+ /*
+ * Set Bit 6 (ENABLE_IA_UNTRUSTED_MODE) of MSR 0x120
+ * UCODE_PCR_POWER_MISC MSR to enter IA Untrusted Mode.
+ */
+ msr_set(MSR_POWER_MISC, ENABLE_IA_UNTRUSTED);
+}
+
static void drop_privilege_all(void)
{
/* Drop privilege level on all the CPUs */
- if (mp_run_on_all_cpus(&cpu_enable_untrusted_mode, NULL) != CB_SUCCESS)
+ if (mp_run_on_all_cpus(&soc_enable_untrusted_mode, NULL) != CB_SUCCESS)
printk(BIOS_ERR, "failed to enable untrusted mode\n");
}
diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h
index 38b830a16f..3157952455 100644
--- a/src/soc/intel/apollolake/include/soc/cpu.h
+++ b/src/soc/intel/apollolake/include/soc/cpu.h
@@ -5,6 +5,7 @@
#include <cpu/x86/msr.h>
#include <intelblocks/msr.h>
+#include <soc/msr.h>
struct device;
void apollolake_init_cpus(struct device *dev);
diff --git a/src/soc/intel/apollolake/include/soc/msr.h b/src/soc/intel/apollolake/include/soc/msr.h
index e35c8814eb..97c67ddc21 100644
--- a/src/soc/intel/apollolake/include/soc/msr.h
+++ b/src/soc/intel/apollolake/include/soc/msr.h
@@ -5,4 +5,8 @@
#include <intelblocks/msr.h>
+#define MSR_POWER_MISC 0x120
+#define ENABLE_IA_UNTRUSTED (1 << 6)
+#define FLUSH_DL1_L2 (1 << 8)
+
#endif
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 27ff8cd151..2209b742c7 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -260,19 +260,6 @@ void cpu_set_eist(bool eist_status)
}
/*
- * Set Bit 6 (ENABLE_IA_UNTRUSTED_MODE) of MSR 0x120
- * UCODE_PCR_POWER_MISC MSR to enter IA Untrusted Mode.
- */
-void cpu_enable_untrusted_mode(void *unused)
-{
- msr_t msr;
-
- msr = rdmsr(MSR_POWER_MISC);
- msr.lo |= ENABLE_IA_UNTRUSTED;
- wrmsr(MSR_POWER_MISC, msr);
-}
-
-/*
* This function fills in the number of Cores(physical) and Threads(virtual)
* of the CPU in the function arguments. It also returns if the number of cores
* and number of threads are equal.
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h
index 094acebd54..3ce80b27db 100644
--- a/src/soc/intel/common/block/include/intelblocks/cpulib.h
+++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h
@@ -112,12 +112,6 @@ void cpu_burst_mode(bool burst_mode_status);
void cpu_set_eist(bool eist_status);
/*
- * Set Bit 6 (ENABLE_IA_UNTRUSTED_MODE) of MSR 0x120
- * UCODE_PCR_POWER_MISC MSR to enter IA Untrusted Mode.
- */
-void cpu_enable_untrusted_mode(void *unused);
-
-/*
* This function fills in the number of Cores(physical) and Threads(virtual)
* of the CPU in the function arguments. It also returns if the number of cores
* and number of threads are equal.
diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h
index e45b34dfec..41440488f4 100644
--- a/src/soc/intel/common/block/include/intelblocks/msr.h
+++ b/src/soc/intel/common/block/include/intelblocks/msr.h
@@ -17,9 +17,6 @@
#define MSR_BIOS_UPGD_TRIG 0x7a
#define SGX_ACTIVATE_BIT (1)
#define MSR_PMG_IO_CAPTURE_BASE 0xe4
-#define MSR_POWER_MISC 0x120
-#define ENABLE_IA_UNTRUSTED (1 << 6)
-#define FLUSH_DL1_L2 (1 << 8)
#define MSR_EMULATE_PM_TIMER 0x121
#define EMULATE_DELAY_OFFSET_VALUE 20
#define EMULATE_PM_TMR_EN (1 << 16)