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Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/chip.c')
-rw-r--r--src/soc/intel/xeon_sp/cpx/chip.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 1fc9c7530b..b0e61b62ae 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -161,8 +161,32 @@ static void chip_final(void *data)
set_bios_init_completion();
}
+/* Only call this code from socket0! */
+static void unlock_pam_regions(void)
+{
+ uint32_t pam0123_unlock_dram = 0x33333330;
+ uint32_t pam456_unlock_dram = 0x00333333;
+ /* Get UBOX(1) for socket0 */
+ uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK);
+
+ /* Assume socket0 owns PCI segment 0 */
+ pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC),
+ SAD_ALL_PAM0123_CSR, pam0123_unlock_dram);
+ pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC),
+ SAD_ALL_PAM456_CSR, pam456_unlock_dram);
+
+ uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV,
+ SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR);
+ uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV,
+ SAD_ALL_FUNC), SAD_ALL_PAM456_CSR);
+ printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n",
+ __FILE__, __func__, reg1, reg2);
+}
+
static void chip_init(void *data)
{
+ unlock_pam_regions();
+
printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n");
fsp_silicon_init();