diff options
Diffstat (limited to 'src/soc/intel/tigerlake/include/soc/cpu.h')
| -rw-r--r-- | src/soc/intel/tigerlake/include/soc/cpu.h | 20 |
1 files changed, 7 insertions, 13 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/cpu.h b/src/soc/intel/tigerlake/include/soc/cpu.h index 0d8e17f49b..b52a0c4bfd 100644 --- a/src/soc/intel/tigerlake/include/soc/cpu.h +++ b/src/soc/intel/tigerlake/include/soc/cpu.h @@ -6,13 +6,13 @@ #include <intelblocks/msr.h> -/* Latency times in units of 32768ns */ -#define C_STATE_LATENCY_CONTROL_0_LIMIT 0x9d -#define C_STATE_LATENCY_CONTROL_1_LIMIT 0x9d -#define C_STATE_LATENCY_CONTROL_2_LIMIT 0x9d -#define C_STATE_LATENCY_CONTROL_3_LIMIT 0x9d -#define C_STATE_LATENCY_CONTROL_4_LIMIT 0x9d -#define C_STATE_LATENCY_CONTROL_5_LIMIT 0x9d +/* Latency times in us */ +#define C1_LATENCY 1 +#define C6_LATENCY 127 +#define C7_LATENCY 253 +#define C8_LATENCY 260 +#define C9_LATENCY 487 +#define C10_LATENCY 1048 /* Power in units of mW */ #define C1_POWER 0x3e8 @@ -25,12 +25,6 @@ /* Common Timer Copy (CTC) frequency - 38.4MHz. */ #define CTC_FREQ 38400000 -#define C_STATE_LATENCY_MICRO_SECONDS(limit, base) \ - (((1 << ((base)*5)) * (limit)) / 1000) -#define C_STATE_LATENCY_FROM_LAT_REG(reg) \ - C_STATE_LATENCY_MICRO_SECONDS(C_STATE_LATENCY_CONTROL_ ##reg## _LIMIT, \ - (IRTL_1024_NS >> 10)) - /* Configure power limits for turbo mode */ void set_power_limits(u8 power_limit_1_time); |