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-rw-r--r--src/soc/intel/tigerlake/acpi/tcss.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl
index be9d306f6e..98337a3e5e 100644
--- a/src/soc/intel/tigerlake/acpi/tcss.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss.asl
@@ -676,7 +676,7 @@ Scope (\_SB.PCI0)
}
}
-#if !CONFIG(SOC_INTEL_TIGERLAKE_S3)
+#if CONFIG(D3COLD_SUPPORT)
Method (TCON, 0)
{
/* Reset IOM D3 cold bit if it is in D3 cold now. */
@@ -787,7 +787,7 @@ Scope (\_SB.PCI0)
STAT = 0
}
}
-#endif // SOC_INTEL_TIGERLAKE_S3
+#endif // D3COLD_SUPPORT
/*
* TCSS xHCI device