2 files changed, 8 insertions, 11 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index de37341a08..2af5a53149 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -205,7 +205,7 @@ static void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->u2we = config->usb2_wake_enable_bitmap;
 	gnvs->u3we = config->usb3_wake_enable_bitmap;
 
-	if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX))
+	if (config->sgx_enable)
 		sgx_fill_gnvs(gnvs);
 }
 
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 5424c91c58..1f9ecada74 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -423,6 +423,8 @@ static void enable_pm_timer_emulation(void)
 /* All CPUs including BSP will run the following function. */
 void soc_core_init(struct device *cpu)
 {
+	config_t *conf = config_of_soc();
+
 	/* Clear out pending MCEs */
 	/* TODO(adurbin): This should only be done on a cold boot. Also, some
 	 * of these banks are core vs package scope. For now every CPU clears
@@ -455,7 +457,8 @@ void soc_core_init(struct device *cpu)
 	enable_turbo();
 
 	/* Configure Core PRMRR for SGX. */
-	prmrr_core_configure();
+	if (conf->sgx_enable)
+		prmrr_core_configure();
 }
 
 static void per_cpu_smm_trigger(void)
@@ -477,6 +480,7 @@ static void fc_lock_configure(void *unused)
 static void post_mp_init(void)
 {
 	int ret = 0;
+	config_t *conf = config_of_soc();
 
 	/* Set Max Ratio */
 	cpu_set_max_ratio();
@@ -493,7 +497,8 @@ static void post_mp_init(void)
 
 	ret |= mp_run_on_all_cpus(vmx_configure, NULL);
 
-	ret |= mp_run_on_all_cpus(sgx_configure, NULL);
+	if (conf->sgx_enable)
+		ret |= mp_run_on_all_cpus(sgx_configure, NULL);
 
 	ret |= mp_run_on_all_cpus(fc_lock_configure, NULL);
 
@@ -559,11 +564,3 @@ void cpu_lock_sgx_memory(void)
 		wrmsr(MSR_LT_LOCK_MEMORY, msr);
 	}
 }
-
-int soc_fill_sgx_param(struct sgx_param *sgx_param)
-{
-	config_t *conf = config_of_soc();
-
-	sgx_param->enable = conf->sgx_enable;
-	return 0;
-}