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path: root/src/soc/intel/skylake/romstage/car_stage_fsp20.S
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Diffstat (limited to 'src/soc/intel/skylake/romstage/car_stage_fsp20.S')
-rw-r--r--src/soc/intel/skylake/romstage/car_stage_fsp20.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/romstage/car_stage_fsp20.S b/src/soc/intel/skylake/romstage/car_stage_fsp20.S
index c6401fa597..5ef8bd61bf 100644
--- a/src/soc/intel/skylake/romstage/car_stage_fsp20.S
+++ b/src/soc/intel/skylake/romstage/car_stage_fsp20.S
@@ -37,7 +37,8 @@ car_stage_entry:
/* Switch to the stack in RAM */
movl %eax, %esp
- #include <soc/car_teardown.S>
+ /* chipset_teardown_car() is expected to disable cache-as-ram. */
+ call chipset_teardown_car
/* Display the MTRRs */
call soc_display_mtrrs