aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/skylake/include
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/ramstage.h (renamed from src/soc/intel/skylake/include/fsp20/soc/ramstage.h)2
-rw-r--r--src/soc/intel/skylake/include/soc/romstage.h (renamed from src/soc/intel/skylake/include/fsp20/soc/romstage.h)0
2 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h b/src/soc/intel/skylake/include/soc/ramstage.h
index e5660a6f66..4157c4e09b 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/soc/ramstage.h
@@ -21,7 +21,7 @@
#include <fsp/api.h>
#include <fsp/util.h>
-#include "../../../chip.h"
+#include "../../chip.h"
#define FSP_SIL_UPD FSP_S_CONFIG
#define FSP_MEM_UPD FSP_M_CONFIG
diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/soc/romstage.h
index 364bf52529..364bf52529 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h
+++ b/src/soc/intel/skylake/include/soc/romstage.h