aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/skylake/include
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/iomap.h2
-rw-r--r--src/soc/intel/skylake/include/soc/thermal.h24
2 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/iomap.h b/src/soc/intel/skylake/include/soc/iomap.h
index 7e99d9984c..0a573acb38 100644
--- a/src/soc/intel/skylake/include/soc/iomap.h
+++ b/src/soc/intel/skylake/include/soc/iomap.h
@@ -64,6 +64,8 @@
#define HECI1_BASE_ADDRESS 0xfed1a000
+#define THERMAL_BASE_ADDRESS 0xfe600000
+
/* CPU Trace reserved memory size */
#define GDXC_MOT_MEMORY_SIZE (96*MiB)
#define GDXC_IOT_MEMORY_SIZE (32*MiB)
diff --git a/src/soc/intel/skylake/include/soc/thermal.h b/src/soc/intel/skylake/include/soc/thermal.h
new file mode 100644
index 0000000000..31c47c6361
--- /dev/null
+++ b/src/soc/intel/skylake/include/soc/thermal.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _SOC_THERMAL_H_
+#define _SOC_THERMAL_H_
+
+#define THERMAL_SENSOR_POWER_MANAGEMENT 0x1c
+
+/* Enable thermal sensor power management */
+void pch_thermal_configuration(void);
+
+#endif