diff options
Diffstat (limited to 'src/soc/intel/skylake/include/soc/irq.h')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/irq.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/irq.h b/src/soc/intel/skylake/include/soc/irq.h new file mode 100644 index 0000000000..7f3fd65617 --- /dev/null +++ b/src/soc/intel/skylake/include/soc/irq.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _SOC_IRQ_H_ +#define _SOC_IRQ_H_ + +#define LPSS_I2C0_IRQ 16 +#define LPSS_I2C1_IRQ 17 +#define LPSS_I2C2_IRQ 18 +#define LPSS_I2C3_IRQ 19 +#define LPSS_I2C4_IRQ 34 +#define LPSS_I2C5_IRQ 33 +#define LPSS_SPI0_IRQ 22 +#define LPSS_SPI1_IRQ 23 +#define LPSS_UART0_IRQ 20 +#define LPSS_UART1_IRQ 21 +#define LPSS_UART2_IRQ 32 +#define SDIO_IRQ 22 + +#endif /* _SOC_IRQ_H_ */ |