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Diffstat (limited to 'src/soc/intel/skylake/cpu.c')
| -rw-r--r-- | src/soc/intel/skylake/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 95d9ad9c8c..dddc1c3c7e 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -226,7 +226,7 @@ static void configure_isst(void) if (conf->speed_shift_enable) { /* * Kernel driver checks CPUID.06h:EAX[Bit 7] to determine if HWP - is supported or not. Coreboot needs to configure MSR 0x1AA + is supported or not. coreboot needs to configure MSR 0x1AA which is then reflected in the CPUID register. */ msr = rdmsr(MSR_MISC_PWR_MGMT); |