diff options
Diffstat (limited to 'src/soc/intel/quark/romstage/romstage.c')
| -rw-r--r-- | src/soc/intel/quark/romstage/romstage.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/intel/quark/romstage/romstage.c b/src/soc/intel/quark/romstage/romstage.c index 93fb24b1c9..2f16c5f37a 100644 --- a/src/soc/intel/quark/romstage/romstage.c +++ b/src/soc/intel/quark/romstage/romstage.c @@ -28,6 +28,22 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/romstage.h> +#include <soc/reg_access.h> + +static const struct reg_script legacy_gpio_init[] = { + /* Temporarily enable the legacy GPIO controller */ + REG_PCI_WRITE32(R_QNC_LPC_GBA_BASE, IO_ADDRESS_VALID + | LEGACY_GPIO_BASE_ADDRESS), + REG_PCI_OR8(PCI_COMMAND, PCI_COMMAND_IO), + REG_SCRIPT_END +}; + +static const struct reg_script i2c_gpio_controller_init[] = { + /* Temporarily enable the GPIO controller */ + REG_PCI_WRITE32(PCI_BASE_ADDRESS_1, I2C_GPIO_BASE_ADDRESS), + REG_PCI_OR8(PCI_COMMAND, PCI_COMMAND_MEMORY), + REG_SCRIPT_END +}; void car_soc_pre_console_init(void) { @@ -39,6 +55,11 @@ void car_soc_pre_console_init(void) void car_soc_post_console_init(void) { report_platform_info(); + + /* Initialize the controllers */ + reg_script_run_on_dev(I2CGPIO_BDF, i2c_gpio_controller_init); + reg_script_run_on_dev(LPC_BDF, legacy_gpio_init); + mainboard_gpio_init(); }; static struct chipset_power_state power_state CAR_GLOBAL; |