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Diffstat (limited to 'src/soc/intel/pantherlake/pcie_rp.c')
-rw-r--r--src/soc/intel/pantherlake/pcie_rp.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/pantherlake/pcie_rp.c b/src/soc/intel/pantherlake/pcie_rp.c
index 374c3aa1e1..1b302fda0e 100644
--- a/src/soc/intel/pantherlake/pcie_rp.c
+++ b/src/soc/intel/pantherlake/pcie_rp.c
@@ -3,7 +3,6 @@
#include <intelblocks/pcie_rp.h>
#include <soc/pci_devs.h>
#include <soc/pcie.h>
-#include <soc/soc_info.h>
/*
* TBT's LCAP registers are returning port index which starts from 0x10 (Usually for other PCIe