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-rw-r--r--src/soc/intel/meteorlake/acpi/tcss.asl6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/meteorlake/acpi/tcss.asl b/src/soc/intel/meteorlake/acpi/tcss.asl
index 7b83b5ff7e..e9ef6c390a 100644
--- a/src/soc/intel/meteorlake/acpi/tcss.asl
+++ b/src/soc/intel/meteorlake/acpi/tcss.asl
@@ -392,7 +392,10 @@ Scope (\_SB.PCI0)
}
- /* From RegBar Base, IOM_TypeC_SW_configuration_1 is at offset 0x40 */
+ /*
+ * From RegBar Base, IOM_TypeC_SW_configuration_1 is in offset 0xC10040, where
+ * 0x40 is the register offset.
+ */
OperationRegion (IOMR, SystemMemory, IOM_BASE_ADDR, 0x100)
Field (IOMR, DWordAcc, NoLock, Preserve)
{
@@ -604,7 +607,6 @@ Scope (\_SB.PCI0)
Return
}
-
/* Request IOM for D3 cold entry sequence. */
/*
* FIXME: Remove this workaround after resolving b/244082753