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Diffstat (limited to 'src/soc/intel/jasperlake/Kconfig')
-rw-r--r--src/soc/intel/jasperlake/Kconfig7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 8fb0f49506..48b735e8d1 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -15,6 +15,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_SUPPORTS_PM_TIMER_EMULATION
select COS_MAPPED_TO_MSB
+ select DISPLAY_FSP_VERSION_INFO_2
select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
@@ -22,6 +23,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
+ select HECI_DISABLE_USING_SMM if DISABLE_HECI1_AT_PRE_BOOT
select IDT_IN_EVERY_STAGE
select INTEL_CAR_NEM_ENHANCED
select INTEL_GMA_ACPI
@@ -63,8 +65,9 @@ config CPU_SPECIFIC_OPTIONS
select TSC_MONOTONIC_TIMER
select UDELAY_TSC
select UDK_202005_BINDING
- select DISPLAY_FSP_VERSION_INFO_2
- select HECI_DISABLE_USING_SMM if DISABLE_HECI1_AT_PRE_BOOT
+ select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
+ select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
+ select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
config DCACHE_RAM_BASE
default 0xfef00000