aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/fsp_baytrail/include/soc/msr.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/fsp_baytrail/include/soc/msr.h')
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/msr.h34
1 files changed, 0 insertions, 34 deletions
diff --git a/src/soc/intel/fsp_baytrail/include/soc/msr.h b/src/soc/intel/fsp_baytrail/include/soc/msr.h
deleted file mode 100644
index 8edab59bdf..0000000000
--- a/src/soc/intel/fsp_baytrail/include/soc/msr.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _BAYTRAIL_MSR_H_
-#define _BAYTRAIL_MSR_H_
-
-#define MSR_BSEL_CR_OVERCLOCK_CONTROL 0xcd
-#define MSR_PLATFORM_INFO 0xce
-#define MSR_PKG_CST_CONFIG_CONTROL 0xe2
-#define MSR_POWER_MISC 0x120
-#define MSR_POWER_CTL 0x1fc
-#define MSR_PKG_POWER_SKU_UNIT 0x606
-#define MSR_PKG_POWER_LIMIT 0x610
-#define MSR_IACORE_RATIOS 0x66a
-#define MSR_IACORE_TURBO_RATIOS 0x66c
-#define MSR_IACORE_VIDS 0x66b
-#define MSR_IACORE_TURBO_VIDS 0x66d
-
-/* Read BCLK from MSR */
-unsigned int bus_freq_khz(void);
-
-#endif /* _BAYTRAIL_MSR_H_ */