diff options
Diffstat (limited to 'src/soc/intel/denverton_ns')
-rw-r--r-- | src/soc/intel/denverton_ns/Kconfig | 1 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/reset.c | 3 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/romstage.c | 4 |
3 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index e22b8ee081..736d567c17 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -33,7 +33,6 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET select PLATFORM_USES_FSP2_0 - select HAVE_HARD_RESET select POSTCAR_STAGE select C_ENVIRONMENT_BOOTBLOCK select IOAPIC diff --git a/src/soc/intel/denverton_ns/reset.c b/src/soc/intel/denverton_ns/reset.c index 97955a574a..577f1c4914 100644 --- a/src/soc/intel/denverton_ns/reset.c +++ b/src/soc/intel/denverton_ns/reset.c @@ -15,13 +15,12 @@ #include <console/console.h> #include <fsp/util.h> -#include <reset.h> void chipset_handle_reset(uint32_t status) { switch (status) { case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ - global_reset(); + die("Global Reset not implemented!\n"); break; default: printk(BIOS_ERR, "unhandled reset type %x\n", status); diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c index cf4ae7c1ed..617b64a619 100644 --- a/src/soc/intel/denverton_ns/romstage.c +++ b/src/soc/intel/denverton_ns/romstage.c @@ -15,9 +15,9 @@ */ #include <cbmem.h> +#include <cf9_reset.h> #include <console/console.h> #include <cpu/x86/mtrr.h> -#include <reset.h> #include <soc/fiamux.h> #include <soc/iomap.h> #include <soc/pci_devs.h> @@ -93,7 +93,7 @@ static void early_pmc_init(void) pci_write_config32(dev, PMC_ETR3, pci_read_config32(dev, PMC_ETR3) | PMC_ETR3_CF9GR); - hard_reset(); + full_reset(); } } } |