aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/denverton_ns/cpu.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/soc/intel/denverton_ns/cpu.c')
-rw-r--r--src/soc/intel/denverton_ns/cpu.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index dd6f00eaf0..e99641330a 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -1,8 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2015 - 2017 Intel Corp.
- * Copyright (C) 2018 Online SAS
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by