diff options
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/Kconfig | 8 | ||||
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 5 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/fast_spi/Kconfig b/src/soc/intel/common/block/fast_spi/Kconfig index 87edb92095..4bd1f59de6 100644 --- a/src/soc/intel/common/block/fast_spi/Kconfig +++ b/src/soc/intel/common/block/fast_spi/Kconfig @@ -2,3 +2,11 @@ config SOC_INTEL_COMMON_BLOCK_FAST_SPI bool help Intel Processor common FAST_SPI support + +config FAST_SPI_DISABLE_WRITE_STATUS + bool "Disable write status SPI opcode" + depends on SOC_INTEL_COMMON_BLOCK_FAST_SPI + default n if CHROMEOS + default y + help + Disable the write status SPI opcode in Intel Fast SPI block. diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index fe0217adad..f7ef68561f 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -144,7 +144,10 @@ void fast_spi_set_opcode_menu(void) void fast_spi_lock_bar(void) { void *spibar = fast_spi_get_bar(); - const uint16_t hsfs = SPIBAR_HSFSTS_FLOCKDN | SPIBAR_HSFSTS_WRSDIS; + uint16_t hsfs = SPIBAR_HSFSTS_FLOCKDN; + + if (IS_ENABLED(CONFIG_FAST_SPI_DISABLE_WRITE_STATUS)) + hsfs |= SPIBAR_HSFSTS_WRSDIS; write16(spibar + SPIBAR_HSFSTS_CTL, hsfs); } |