diff options
Diffstat (limited to 'src/soc/intel/common/block/systemagent')
-rw-r--r-- | src/soc/intel/common/block/systemagent/memmap.c | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/systemagent/memmap.c b/src/soc/intel/common/block/systemagent/memmap.c index ea22aa6d18..809c13a1ff 100644 --- a/src/soc/intel/common/block/systemagent/memmap.c +++ b/src/soc/intel/common/block/systemagent/memmap.c @@ -19,15 +19,82 @@ #include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> +#include <fsp/util.h> +#include <intelblocks/ebda.h> #include <intelblocks/systemagent.h> #include <stdlib.h> +/* + * Expected Host Memory Map (we don't know 100% and not all regions are present on all SoCs): + * + * +---------------------------+ TOUUD + * | | + * +---------------------------+ TOM (if mem > 4GB) + * | CSME UMA (if mem > 4 GiB) | + * +---------------------------+ TOUUD + * | | + * +---------------------------+ 4GiB + * | PCI Address Space | + * +---------------------------+ TOM (if mem < 4GB) + * | CSME UMA (if mem < 4 GiB) | + * +---------------------------+ TOLUD (also maps into MC address space) + * | iGD / DSM | + * +---------------------------+ BDSM + * | GTT / GSM | + * +---------------------------+ TOLM + * | TSEG | + * +---------------------------+ TSEGMB + * | DMA Protected Region | + * +---------------------------+ DPR + * | PRM (C6DRAM/SGX) | + * +---------------------------+ PRMRR + * | Probeless Trace | + * +---------------------------+ ME Stolen + * | PTT | + * +---------------------------+ TOLUM / top_of_ram / cbmem_top + * | CBMEM Root | + * +---------------------------+ + * | FSP Reserved Memory | + * +---------------------------+ + * | various CBMEM entries | + * +---------------------------+ top_of_stack (8 byte aligned) + * | stack (CBMEM entry) | + * +---------------------------+ FSP TOLUM + * | | + * +---------------------------+ 0 + */ + void smm_region(uintptr_t *start, size_t *size) { *start = sa_get_tseg_base(); *size = sa_get_tseg_size(); } +#if CONFIG(SOC_INTEL_COMMON_BLOCK_EBDA) +void fill_memmap_ebda(struct ebda_config *cfg) +{ + struct range_entry tolum; + + fsp_find_bootloader_tolum(&tolum); + cfg->cbmem_top = range_entry_end(&tolum); +} + +void cbmem_top_init(void) +{ + /* Initialize EBDA area */ + initialize_ebda_area(); +} + +void *cbmem_top_chipset(void) +{ + struct ebda_config ebda_cfg; + + retrieve_ebda_object(&ebda_cfg); + + return (void *)(uintptr_t)ebda_cfg.cbmem_top; +} +#endif + void fill_postcar_frame(struct postcar_frame *pcf) { uintptr_t top_of_ram; |