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Diffstat (limited to 'src/soc/intel/common/block/smbus')
-rw-r--r--src/soc/intel/common/block/smbus/tco.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/src/soc/intel/common/block/smbus/tco.c b/src/soc/intel/common/block/smbus/tco.c
index 518541b1ab..1ca88428ba 100644
--- a/src/soc/intel/common/block/smbus/tco.c
+++ b/src/soc/intel/common/block/smbus/tco.c
@@ -7,6 +7,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
+#include <intelblocks/gpmr.h>
#include <intelblocks/pcr.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/tco.h>
@@ -16,10 +17,6 @@
#include <soc/pm.h>
#include <soc/smbus.h>
-#define PCR_DMI_TCOBASE 0x2778
-/* Enable TCO I/O range decode. */
-#define TCOEN (1 << 1)
-
/* SMBUS TCO base address. */
#define TCOBASE 0x50
#define TCOCTL 0x54
@@ -122,10 +119,8 @@ static void tco_enable_bar(void)
/* Enable TCO in SMBUS */
pci_write_config32(dev, TCOCTL, reg32 | TCO_BASE_EN);
- /*
- * Program "TCO Base Address" PCR[DMI] + 2778h[15:5, 1]
- */
- pcr_write32(PID_DMI, PCR_DMI_TCOBASE, tcobase | TCOEN);
+ /* Program TCO Base Address */
+ gpmr_write32(GPMR_TCOBASE, tcobase | GPMR_TCOEN);
}
/*